Global Semiconductor Industry Research Articles

Multimarket contact between partners and strategic alliance survival

AbstractResearch SummaryThe impact of multimarket contact (MMC) between partners on strategic alliance survival is unclear, even though recent studies have suggested that MMC increases the likelihood of alliance formation. Our study investigates this issue by integrating two mechanisms occurring between multimarket firms: mutual forbearance and technological resource imitation. We argue that MMC between partners deters opportunism in alliances via mutual forbearance, resulting in a positive effect on the likelihood of strategic alliance survival. We also suggest that the positive effect is weakened in two settings with higher risks of technological resource imitation: technological overlap between partners and the presence of R&D activities in an alliance. Evidence from strategic alliances in the global semiconductor industry supports these conclusions.Managerial SummaryRecent research has shown that firms encountering each other in multiple markets are more likely to form strategic alliances, but it is unclear whether these firms are likely to stick together. Our theory suggests that the threat of broad retaliation limits opportunism and increases the likelihood of alliance survival when partners encounter each other in multiple markets. Nonetheless, in settings where partners have similar technologies, or in alliances involving R&D activities, their ability and incentives to copy each other's technological resources offsets the positive effect of multimarket contact on alliance survival. We study strategic alliances in the global semiconductor industry and find evidence consistent with these arguments.

Operating Efficiency in the Capital-Intensive Semiconductor Industry: A Nonparametric Frontier Approach

Abstract This article uses a nonparametric production frontier approach to investigate the operating efficiency differences by the impacts of capital expenditure and business model in the global semiconductor industry. Handling the impact of capital expenditure as a fixed input by the directional distance estimator, this study compares the operating efficiencies in the global semiconductor industry between the integrated device manufacturers and the fabless and foundry firms over 1999–2018. The estimation results indicate that the operating efficiencies do vary in the semiconductor by the business model. The vertically integrated manufacturers dominate the semiconductor industry, and the capital-intensive manufacturers operate more efficiently than the asset-light fabless firms on average.

Structural resilience evolution and vulnerability assessment of semiconductor materials supply network in the global semiconductor industry

In the context of the complex global supply chain situation, which faces significant challenges for the sustainable development of the semiconductor industry, such as energy and resource consumption, addressing risks and resilience issues, and sustainable resource management, etc. Therefore, this paper constructs a directed weighted supply network of semiconductor materials (gallium, germanium, and silicon) from an upstream perspective within the semiconductor industry chain during the period 2013–2022, which assesses the structural resilience under steady-state scenarios and vulnerability under the impact of risk attacks, and identifies resource power and resource center countries (or regions) within this network. The results demonstrate an improvement in the structural resilience of the gallium and germanium material supply networks, accompanied by an increase in vulnerability. There is a transition from a more centralized distribution of resource power among core countries (or regions) towards a more decentralized arrangement, while resource center countries (or regions) exhibit relative stability. In contrast, the structural resilience of the silicon material supply network declines, with a slight reduction in vulnerability. The shifts in resource power and resource center status among core countries (or regions) remain relatively stable. In conclusion, this paper presents policy recommendations aimed at enhancing the resilience of the global semiconductor materials supply chain.

Chiplet Technology: Revolutionizing Semiconductor Design- A Review

This article explores the transformative journey of semiconductor design from monolithic structures to the cutting-edge era of chiplets. Chiplets, modular components offering specific functionalities, have emerged as a catalyst, reshaping the global semiconductor industry. Their capacity for tight interconnectivity, diverse applications, and cost-effective manufacturing marks a paradigm shift. The article delves into the historical context of Moore's Law, the rise of chiplets, and their impact on the semiconductor landscape. It further discusses key considerations in chiplet architecture, optimization algorithms, and future adoption in industries like data centers, mobile devices, AI, and automotive. Chiplet-based designs promise enhanced efficiency, collaboration, and innovation, heralding a new era in semiconductor evolution.

Glass Core Substrates Opportunities for CHIPS and MMI -from Research to Manufacturing

Why is packaging of national importance to the US? • Global semiconductor industry projected to become a trillion-dollar industry by 2030. • US losing leadership. • 2022: CHIPS for America Act.

(Keynote) Technological Challenges and Emerging Device Architectures for Future Semiconductor Micro and Nanoelectronics

Semiconductor technology has known an exponential evolution in the last decades and is fully integrated in our everyday life. According to the Semiconductor Industry association (SIA) the global semiconductor industry sales reaches about US$ 700 billion in 2023, corresponding with a shipment of more than 1.2 trillion components. This necessitates implementation of many novel materials, advanced design concepts and new transistor structures.Increased device performance and reduced power consumption, while maintaining a good manufacturability and yield performance without penalizing the cost/function, are driving microelectronic research towards 3-nm technologies. A large variety of device architectures such as FinFETs, TFETs, negative capacitance, Gate-All-Around, nanowires (NWs), nanosheets (NSs) in both horizontal or vertical configurations, CFET and Forksheet structures are extensively investigated for both logic and analog/RF building blocks enabling System-on-Chip (SoC) applications.In addition to the huge progress achieved in silicon technology, heterogenous integration of Ge and III-V technologies on a silicon platform shows a strong potential, leading towards the on-chip integration of building blocks with different functionality. The fact that both Ge and III-V materials can be selectively grown on Si has strongly triggered the interest in heterogeneous integration.Wide bandgap materials such as GaN offer unique features for RF applications used in base stations for mobile communication, complementing the performance of Si devices suffering from limited output power. These materials can epitaxially be grown on Si substrates. One of the main challenges related to the hetero epitaxy of III-V materials on a Si substrate is the control of extended defects due to the lattice mismatch of the different materials. In recent years, there has been a strong increase in the commercial availability of GaN devices, although for certain applications there is a competition with SiC.Complex and dense SoC applications can be realized by 3D wafer stacking using Through-Silicon-Vias (TSV) for wafer-to-wafer bonding. The 3D integration results in a reduction of the RC product and interconnect length, a smaller form factor and enables vertical partitioning. Main challenges are the TSV process module itself (e.g. Cu via filling, mechanical stress, contamination, keep-out-zone), the wafer thinning and handling and the 3D stacking technology (stacking density, pitch, chip-to-chip interconnect etc.). Very promising results are obtained for monolithic sequential 3D (S3D) processing based on the processing of different tiers on top of each other. Difference can be made between transistor level (n- and pMOS), CMOS level (different standard cells in different tiers) and IP block level for the partitioning. In this way it is e.g. possible to process first CMOS circuits in the Si substrate and then further processing in a III-V layer on top. Benefits are related to an enhanced device density per chip area and a shorter interconnection length. A low cost less scalable tier can be processed on top of an expensive scalable tier as done in the case of logic-memory integration.Major trends in above mentioned process integration approaches are reviewed and technological challenges of some process modules and device structures highlighted.

Semiconductors at the Intersection of Geoeconomics, Technonationalism, and Global Value Chains

This study provides a historical and contemporary analysis of the United States’ strategies in the global semiconductor industry, framed within Joseph Nye’s three-dimensional chessboard analysis. This study examines the strategic responses of the United States from the 1980s to the present, connecting these shifts to changes in international politics and geoeconomic alliances. It scrutinizes how the U.S. utilized its unipolar power to respond to Japan’s growing semiconductor industry influence in the 1980s and its adoption of free-market principles during the globalization era of the 1990s and 2000s. It further discusses how these multilateral shifts have led to a resurgence of technonationalism in the late 2010s, responding to asymmetric interdependence in the global value chain of the semiconductor industry. This research contributes to the comprehension of the dynamics of the industry within international politics and suggests insights into the ongoing Sino–American competition and strategic realignment in the sector.

The geoeconomics of global semiconductor value chains: extraterritoriality and the US-China technology rivalry

This paper conducts a study into the exercise and development of US structural power in the global semiconductor industry and offers a geoeconomics explanation for US dominance in the sector. It emphasizes the role of legal jurisdiction and spatial dimensions of technological development in perpetuating US structural power in global semiconductor value chains. The goal of this paper is to apply the concept of extraterritoriality to the study of structural power; how it is acquired, and how it is used. It explains why we should consider extraterritoriality as a feature of US structural power in International Political Economy (IPE) and suggests three features to help illuminate the concept: Power in global value chains, legal-jurisdictional power, and alliance-based power. The paper first explains how the US acquired the policy tools and leading market position for projecting extraterritorial power in the semiconductor industry during the late twentieth century, how it then utilized its structural privileges to target Chinese technology firms, and finally, the current and potential constraints on its deployment based on the reactions of Chinese and US transnational corporate actors.

Recycling Test Methods to Improve Test Capacity and Increase Chip Shipments

In this research, we quantified semiconductor fabrication capability parameters and test capability parameters and used a digital integrated circuit test model (DITM) to discuss the impact of the test guardband (TGB) on test yield. Furthermore, the DITM can be used to estimate the yield distribution trend of future semiconductor products using data from the IEEE International Roadmap for Devices and Systems (IRDS) 2021 Table. With the COVID-19 pandemic, the global semiconductor industry is facing chip and material shortages. Furthermore, test technology lags behind semiconductor manufacturing technology, and the test yield of production capacity is deteriorating, seriously affecting the entire semiconductor supply chain. Therefore, we proposed the recycling test method, extending the test time, moving TGB, and repeatedly looking for reliable products. These parameters were calculated using the estimated product parameters released by the IRDS 2021. We proved that the proposed recycling test method could improve the high-yield target of semiconductor testing. As long as test methods are used properly, not only can high-yield shipments be made, but also companies’ overall profit will be significantly improved, and the problem of chip shortages will be solved.

Co-evolutions in global decoupling: Learning from the global semiconductor industry

Discussion of deglobalization in recent years appears to be focused on decoupling the People’s Republic of China (PRC) from the US-led global value chains (GVCs). While country policies co-evolve with one another in decoupling, firm strategic responses co-evolve with government policies. In this study, we explore key co-evolutionary conditions of reciprocally coupled ecosystems, diversity and selective stress in the context of the global semiconductor industry. We apply co-evolutionary constructs of bidirectional causality, qualitatively new system, and niche specialization to make sense of adaptive responses of third-party manufacturers (Taiwanese foundry businesses) in the US-PRC decoupling. Our study posits that a third-party manufacturer can survive, and even enhance their strategic and competitive advantages, despite political disruptions in international markets. Third-party manufacturers can engage in symbolic decentralization and balancing strategies with regard to their manufacturing locations in their co-evolutions with the policy changes during the US-PRC decoupling.

China Chipmaking Industry’s Countermeasures Toward U.S. Sanctions and the Most Recent Achievements

The Sino-US technology war has greatly impacted China’s technological sector, including the semiconductor industry, which is instrumental in the production of technological products that are crucial in commercial and military technology. Previous research has failed to explore the specific development situation and development prospects of the leading emerging technology companies in China. Hence, this research aimed at addressing the identified gap in the literature on the Sino-US technology war, using a case study approach that focused on three main companies in China’s RF chip industry: Maxscend, Vanchip, and Microgate. Generally, the results reveal that although China’s domestic RF chip industry has grown rapidly in preparation for self-sufficiency, local companies in the industry are still facing several obstacles that are hindering self-sufficiency, mainly competition from the US, Japan, and other developed RF chip industries. Consistent with previous research, this case study urges the Chinese government to continue providing subsidies to its semiconductor industry and ensure that local technology companies have adequate funding for their development projects. Additionally, this case study proposes that the Chinese government should collaborate with local technology companies to increase human capital, since inadequate human capital is identified as a key barrier in China’s progress toward achieving self-sufficiency. Furthermore, China should make improvements in explicit knowledge transfers, as advancements in aspects such as intellectual property theft will assist local companies in keeping pace with the competition in the global semiconductor industry.

Semiconductors Industry – Importance and Challenges For The Eu Industry Development

Semiconductors are an essential component of all electronical devices, and therefore an essential part of our world today. With the fast-paced innovation and technological advancements, even more demand is being put on semiconductor industry every day, an industry that has already been disrupted by COVID-19 pandemic and its negative effects on global supply chains. The importance of having a strong semiconductors industry is recognised by countries in all parts of the world, as shortage of semiconductors, or chips, can, not only bring the technological advancements and electronics industry to a halt, it can also pose serious risks for national economy and safety. In line with countries like United states, China, Japan and others, EU has recognised the need to increase the competitiveness in the semiconductor industry, improve its position in the global value chain and increase resilience to disruptions in the global supply chains. In order to achieve this, EU has implemented specific measures to proactively prepare and respond to future disruptions in the supply chains, and in that way, strengthen European semiconductor industry. This paper aims to explain the importance of the topic of semiconductors in the context of today’s economy and industry, show the current state of the global semiconductor industry and processes which it involves.

Decoupling Between the Energy and Semiconductor Sectors During the Pandemic: New Evidence from Wavelet Analysis

ABSTRACT We study the impact of COVID-19 on the pairwise dependence between three indices, the COVID-19 Media Coverage Index, MSCI World Semiconductor Index, and the MSCI World Energy Index, as well as investigate the respective volatility spillovers. We find intervals of weak, moderate, and strong coherence between the Media Coverage Index and returns and volatility of semiconductor and energy sector companies. Low coherence intervals indicate a diversification potential of investments in these sectors and in their volatility-based products during periods of systemic crises such as the financial turmoil induced by COVID-19. Our results provide evidence that after the escalation of the pandemic in early 2020, the energy sector cedes its leading role in terms of volatility to the semiconductor industry. We report on appealing hedging attributes related to the decoupling between the trends in the global semiconductor industry and the global energy sector accelerated by the COVID-19 triggered crisis.

Systematic Risk Analysis of Semiconductor Global Market Based on Deep Feature Fusion K-Means Algorithm.

As the global semiconductor industry has entered a new round of rapid growth, it has also entered a golden cycle of economic growth. Semiconductor companies increase their intrinsic value through financing, industry mergers and acquisitions, and venture capital searches. At the same time, market investors pay more attention to the intrinsic value of companies when looking for good investment targets. Therefore, the systematic risk assessment of the global semiconductor market has become a common concern of market investors and corporate management. In this context, this paper found a method that can assess the systemic risk of the semiconductor global market, which is to use the K-means algorithm based on deep feature fusion. This paper analyzed the algorithm in depth, analyzed the quantum space of tensors, and used the definition of cluster fusion to obtain the relationship between the projection matrices U and V. Experiments were carried out on the improved algorithm, and market research was conducted on a multinational semiconductor company A, which mainly included the basic statistics of the rate of return and the ACF and PACF coefficients of the rate of return series. Finally, the stock risk comparison of company A and company B in the same period was carried out. The experimental results showed that comparing the three items of compound growth rate, coefficient of variation, and active rate coefficient, the highest compound growth rate was 0.41, which came from Category 2, the highest variation coefficient was 2.31, which came from Category 10, and the highest active rate coefficient was 1.78, which came from Category 9. The experimental content was completed well.

한국 반도체산업의 수출경쟁력에 관한 연구

The purpose of this study is to increase the demand for semiconductors due to the vulnerability of the division of labor caused by COVID-19 and the acceleration of digital transformation, major global countries are simultaneously strengthening their strategies to internalize the semiconductor supply chain. Changes in the global semiconductor industry can also predict a big impact on the Korean semiconductor industry. As a basic task to find ways to enhance Korea's export competitiveness in the future due to such global environmental changes, it is to analyze the export competitiveness of the Korean semiconductor industry in the global market and prepare a plan to enhance export competitiveness accordingly.
 In order to analyze the export competitiveness of the Korean semiconductor industry, based on UN comtrade statistical data of customs clearance data from 2011 to 2020, Global market share (IMS), trade specificity index (TSI), and current comparative advantage index (RCA) to improve the competitiveness of eight major countries in the global market by analyzing the MTI 6 unit 8 item group classification and the export competitiveness of the Korean semiconductor industry by HS 6 unit 18 item classification, in various ways, In the rapidly changing world market after the US-China trade war and Russia-Ukraine war, it was intended to contribute to the preparation of measures to enhance the competitiveness of the Korean semiconductor industry.

Carbon based electronic technology in post-Moore era: progress, applications and challenges

In the past 60 years, silicon-based semiconductor technology has triggered off the profound change of our information society, but it is also gradually approaching to the physical limit and engineering limit as well. Thus, the global semiconductor industry has entered into the post-Moore era. Carbon nanotube has many excellent electronic properties such as high mobility and ultra-thin body, so it has become a hopeful candidate for the new semiconductor material in the post-Moore era. After more than 20 years of development, carbon based electronic technology has made fundamental breakthroughs in many basic problems such as material preparation, Ohmic metal-semiconductor contact and gate engineering. In principle, there is no insurmountable obstacle in its industrialization process now. Therefore, in this paper the intrinsic advantages of carbon based electronic technology in the post-Moore era is introduced, the basic problems, progress and optimization direction of carbon based electronic technology are summarized, the application prospects in the fields of digital circuits, radio frequency electronics, sensing and detection, three-dimensional integration and chips for special applications are presented. Finally, the comprehensive challenges to the industrialization of carbon based electronic technology are analyzed, and its future development is also prospected.

Geopolitics and the Global Semiconductor Industry

Geopolitics and the Global Semiconductor Industry

Traversing Excitonic and Ionic Landscapes: Reduced-Dimensionality-Inspired Design of Organometal Halide Semiconductors for Energy Applications.

At the very heart of the global semiconductor industry lies the omnipresent push for new materials discovery. New materials constantly rise and fall out of fashion in the scientific literature, with those passing an initial phase of research scrutiny becoming hotbeds of characterization and optimization efforts. Yet, innumerable hours of painstaking research have been devoted to materials that have ultimately fallen by the wayside after crossing over an indefinable threshold, whereupon historical optimism is met with newfound skepticism. Materials have to perform well, and they have to do it quickly. In the past decade, metal-halide perovskites (MHPs) have garnered widespread attention. The hegemonic view in both academic and industrial circles is that these materials could be engineered to meet the demands of the semiconductor industry. Their promise as inexpensive solar cell devices is highly attractive, and it has been nothing short of remarkable that efficiencies have risen from 3.8% in 2009 to more than 25.5% in 2021. Moreover, MHPs are poised to be revolutionary materials in more ways than one. The highest MHP LED efficiency was recently reported (23.4%), and MHPs have demonstrated promise in photodetectors, memristors, and transistors. However, the many excellent properties of MHPs are contrasted by longstanding stability and reproducibility limitations that have hindered their commercialization. Overcoming the limitations of MHPs is ultimately a materials engineering problem, which should be solved by mapping more precise relationships between structure, composition, and device performance. In 1958, Francis Crick famously developed the central dogma of molecular biology which describes the unidirectional flow of information in biological systems. In the words of Crick, "nature has devised a unique instrument in which an underlying simplicity is used to express great subtlety and versatility." In this Account, taking inspiration from the hierarchical organization of nature, we describe a hierarchical approach to materials engineering of organic metal-halide semiconductors. We demonstrate that organo-metal halide semiconductors' dimensionality, composition, and morphology dictate their optoelectronic properties and can be exploited in defining more explicit relationships between structure and function. Here, we traverse three-dimensional (3D), two-dimensional (2D), and one-dimensional (1D) organo-metal halide semiconductors, detailing the morphological and compositional differences in each and the implications that can be drawn within each domain on the engineering process. Control over ion migration pathways via morphology engineering as well as control over charge formation in organic-inorganic semiconductors is demonstrated. Fundamental insights into the amount of static and dynamic disorder in the MHP lattice are provided, which can be continuously tuned as a function of composition and morphology. Using electroabsorption spectroscopy on 2D MHPs, a disorder-induced dipole moment in the exciton proportional to the summed value of static and dynamic disorder is measured. Spectroscopic isolation of exciton features in 2D MHP electroabsorption spectra allows us to obtain precise, model-independent measurements of exciton binding energies to study the effect of chemical substitutions, such as Sn2+ → Pb2+, on the value of the exciton binding energy. Finally, we conclude that this multidimensional platform, with the aid of machine learning and robotics, will be foundational in accurately predicting structure-property-device relationships in organo-metal halide semiconductors in the future.

Tradeoffs between economies of scale and specialization in efficiency for the global semiconductor industry

ABSTRACT This paper combines the semiparametric modified ordinary least-squares approach by Simar et al. (2017) with the nonparametric shape constraint regression approach by Du et al. (2013) to evaluate the performance in the semiconductor industry. Using panel data on 470 companies in the global semiconductor industry over 1999–2018, we compare technical eficiencies between the integrated device manufacturer business model and the fabless-foundry business model. The performance differences between the vertically integrated device manufacturers and the vertically specialized fabless and foundry firms are disentangled by the intensity of labour and capital in a very flexible form. The estimation results indicate that the capital-intensive integrated device manufacturers taking advantage of the economies of scale are operating more efficiently than the niche fabless companies in the global semiconductor industry.

Are governance mode and foreign location choices independent?

AbstractResearch SummaryThis article explores the relationship between organizational governance and location choices. While the existing literature provides significant intuition regarding the factors that influence these choices, it often assumes that governance and location choice are independent from one another. This article tests the veracity of this assumption in the global semiconductor industry. We report evidence of significant correlations across choices regarding how to govern and where to locate production, evidence of a reciprocal relationship between governance and location choices, and evidence suggesting how interdependence between governance and location choices affects the stability of relationships highlighted by extant theories. We conclude with implications for future theoretical and empirical research based on the existence of these interdependent effects.Managerial SummaryManagers face difficult choices when deciding how to organize the performance of an activity. They must choose whether to outsource an activity by balancing the potential benefits of a supplier's lower costs or knowledge against the costs of diminished coordination and control. They must also choose where to perform an activity by considering the benefits of locally bound expertise as well as potential costs associated with cultural, legal, and social barriers. While prior research has often addressed these issues by assuming that these choices are independent, this paper demonstrates that governance and location choices are interdependent and that each choice reciprocally affects the other. It concludes by suggesting managers utilize an expanded governance‐location choice set when evaluating where and how to manage their core activities.